A fully synchronous, single-clock streaming decompression core providing 395.37 MB/s qualified throughput at 100 MHz on Artix-7 with zero DSP resource consumption.
Qualified Vivado commercial out-of-context (OOC) synthesis results on Artix-7.
Standard AXI4-Stream compressed input and decompressed output. Includes AXI4-Lite control registers, status indicators, and performance counters with full ready/valid backpressure support.
Features deterministic malformed-stream error reporting, sticky error status, runtime block-length protection, and automatic recovery protocols after fatal block errors.
Delivered as synthesizable SystemVerilog RTL. Includes integration testbenches, reference 100 MHz XDC constraints, and raw LZ4 block compatibility.
Submit your corporate details to receive the encrypted IEEE 1735 evaluation package for your target FPGA architecture.